1. Field of the Invention
The invention relates to generally to capacitors and the manufacture thereof, and more particularly relates to high capacitance, low inductance capacitors suitable for use with high speed integrated circuits.
2. Background
Advances in semiconductor manufacturing technology have led to dramatic increases in both the number and speed of operation of the transistors present in integrated circuits. Such integrated circuits with large numbers of fast switching transistors tend to require a large amount of decoupling capacitance. As is well known in this field, decoupling capacitance refers to the capacitance, typically added intentionally to a circuit, between the power and ground nodes.
Traditionally, decoupling capacitors used in conjunction with integrated circuits have been mounted on printed circuit boards in close proximity to the integrated circuits themselves. However, as switching speeds have increased and the amount of current being switched increased, the need for larger amounts of decoupling capacitance has also increased.
One of the problems faced by engineers in trying to provide greater amounts of decoupling capacitance includes the physical space on printed circuit boards required for the additional capacitors. Another problem is the parasitic inductance introduced by the leads of the capacitors used to connect the capacitors to various circuit nodes. This parasitic inductance degrades the effectiveness of the decoupling capacitor.
What is needed is a capacitor having a high capacitance value, and low inductance, while consuming a small area. What is further needed is a method of manufacturing such a capacitor.